How to Read a Pin on the Tm4c123
Chapter 6: Parallel I/O ports
Jonathan Valvano and Ramesh Yerraballi
The affiliate covers the purpose of parallel ports, how to program them using memory-mapped I/O and initialization rituals. We will learn how to access I/O registers in a friendly fashion. We volition exam the system by unmarried-stepping in the simulator, and we will observe the running system using a logic analyzer.
| Learning Objectives:
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Video 6.0. Introduction to Parallel Ports, Memory-mapped admission and Debugging |
6.0. Introduction
Our first input/output interfaces will use the parallel ports or GPIO, allowing us to commutation digital data with the external earth. From the very starting time of a projection, we must consider how the system will be tested. In this affiliate we present some debugging techniques that will be very useful for verifying proper operation of our system. Effective debugging tools are designed into the system becoming part of the organisation, rather than attached onto the system later it is congenital.
In this chapter, nosotros nowadays the I/O pin configurations for the TM4C123 microcontrollers. The regular function of a pivot is to perform parallel I/O. Most pins, however, have an alternative function. For example, port pins PA1 and PA0 can be either regular parallel port pins or an asynchronous series port chosen universal asynchronous receiver/transmitter (UART). The ability to manage fourth dimension, equally an input measurement and an output parameter, has made a pregnant impact on the market place share growth of microcontrollers. Joint Examination Action Grouping (JTAG), standardized as the IEEE 1149.1, is a standard test access port used to program and debug the microcontroller lath. Each microcontroller uses five port pins for the JTAG interface.
Common Fault: Even though it is possible to use the 5 JTAG pins as general I/O, debugging nigh microcontroller boards will be more stable if these five pins are left dedicated to the JTAG debugger.
I/O pins on Stellaris and Tiva microcontrollers have a broad range of culling functions:
• UART Universal asynchronous receiver/transmitter
• SSI Synchronous serial interface
• IiiC Inter-integrated circuit
• Timer Periodic interrupts, input capture, and output compare
• PWM Pulse width modulation
• ADC Analog to digital converter, measure out analog signals
• Analog Comparator Compar e ii analog signals
• QEI Quadrature encoder interface
• USB Universal serial bus
• Ethernet High-speed network
• CAN Controller area network
The UART can be used for serial communication between computers. It is asynchronous and allows for simultaneous advice in both directions. The SSI is alternately called serial peripheral interface (SPI). Information technology is used to interface medium-speed I/O devices. In this volume, we volition employ it to interface a graphics display. Nosotros could use SSI to interface a digital to analog converter (DAC) or a secure digital card (SDC). IiiC is a simple I/O charabanc that we volition utilise to interface depression speed peripheral devices. Input capture and output compare will be used to create periodic interrupts and measure flow, pulse width, stage, and frequency. PWM outputs will be used to employ variable power to motor interfaces. In a typical motor controller, input capture measures rotational speed, and PWM controls power. A PWM output tin can as well exist used to create a DAC. The ADC will be used to measure the aamplitude of analog signals and volition exist important in information acquisition systems. The analog comparator takes two analog inputs and produces a digital output depending on which analog input is greater. The QEI can be used to interface a brushless DC motor. USB is a loftier-speed serial communication aqueduct. The Ethernet port tin exist used to bridge the microcontroller to the Internet or a local expanse network. The CAN creates a loftier-speed communication channel betwixt microcontrollers and is commonly constitute in automotive and other distributed command applications.
Ascertainment: The expression mixed-bespeak refers to a arrangement with both analog and digital components. Notice how many I/O ports perform this analog↔digital span: ADC, DAC, analog comparator, PWM, QEI, Input capture, and output compare.
half dozen.i. Stellaris LM4F120 and Tiva TM4C123 LaunchPad I/O pins
Figure 6.1 draws the I/O port construction for the LM4F120H5QR and TM4C123GH6PM . These microcontrollers are used on the EK-LM4F120XL and EK-TM4C123GXL LaunchPads . Pins on the LM3S family take 2 possibilities: digital I/O or an alternative function. However, pins on the LM4F/TM4C family tin exist assigned to as many as eight unlike I/O functions. Pins can be configured for digital I/O, analog input, timer I/O, or serial I/O. For example PA0 tin be digital I/O or serial input. In that location are ii buses used for I/O. The digital I/O ports are connected to both the avant-garde peripheral bus and the advanced high-operation bus. Because of the multiple buses, the microcontroller tin perform I/O passenger vehicle cycles simultaneous with instruction fetches from wink ROM. The LM4F120H5QR has viii UART ports, four SSI ports, four I2C ports, 2 12-chip ADCs, twelve timers, a CAN port, and a USB interface. The TM4C123GH6PM adds up to 16 PWM outputs. In that location are 43 I/O lines. At that place are twelve ADC inputs; each ADC can convert up to 1M samples per 2d. Table six.1 lists the regular and alternating names of the port pins.
Figure 6.1. I/O port pins for the LM4F120H5QR / TM4C123GH6PM microcontrollers.
Each pin has one configuration fleck in the GPIOAMSEL register. We set up this bit to connect the port pivot to the ADC or analog comparator. For digital functions, each pin also has 4 bits in the GPIOPCTL annals, which we gear up to specify the culling function for that pin (0 means regular I/O port). Not every pivot tin be connected to every culling office. See Table 6.one.
Pins PC3 – PC0 were left off Table 6.one because these iv pins are reserved for the JTAG debugger and should non be used for regular I/O. Notice, most alternate function modules (eastward.k., U0Rx) only be on one pivot (PA0). While other functions could exist mapped to ii or iii pins (e.thou., CAN0Rx could be mapped to one of the following: PB4, PE4, or PF0.)
For instance, if we wished to use UART7 on pins PE0 and PE1, we would set bits 1,0 in the GPIO_PORTE_DEN_R register (enable digital), clear bits 1,0 in the GPIO_PORTE_AMSEL_R register (disable analog), set the PMCx bits in the GPIO_PORTE_PCTL_R register for PE0, PE1 to 0001 (enable UART functionality), and ready bits ane,0 in the GPIO_PORTE_AFSEL_R register (enable alternating function). If we wished to sample an analog bespeak on PD0, we would gear up fleck 0 in the alternate role select register, clear bit 0 in the digital enable register (disable digital), set bit 0 in the analog manner select register (enable analog), and activate 1 of the ADCs to sample channel seven.
| IO | Ain | 0 | one | 2 | 3 | 4 | 5 | 6 | seven | 8 | 9 | xiv |
| PA0 | Port | U0Rx | CAN1Rx | |||||||||
| PA1 | Port | U0Tx | CAN1Tx | |||||||||
| PA2 | Port | SSI0Clk | ||||||||||
| PA3 | Port | SSI0Fss | ||||||||||
| PA4 | Port | SSI0Rx | ||||||||||
| PA5 | Port | SSI0Tx | ||||||||||
| PA6 | Port | ItwoC1SCL | M1PWM2 | |||||||||
| PA7 | Port | I2C1SDA | M1PWM3 | |||||||||
| PB0 | Port | U1Rx | T2CCP0 | |||||||||
| PB1 | Port | U1Tx | T2CCP1 | |||||||||
| PB2 | Port | ItwoC0SCL | T3CCP0 | |||||||||
| PB3 | Port | I2C0SDA | T3CCP1 | |||||||||
| PB4 | Ain10 | Port | SSI2Clk | M0PWM2 | T1CCP0 | CAN0Rx | ||||||
| PB5 | Ain11 | Port | SSI2Fss | M0PWM3 | T1CCP1 | CAN0Tx | ||||||
| PB6 | Port | SSI2Rx | M0PWM0 | T0CCP0 | ||||||||
| PB7 | Port | SSI2Tx | M0PWM1 | T0CCP1 | ||||||||
| PC4 | C1- | Port | U4Rx | U1Rx | M0PWM6 | IDX1 | WT0CCP0 | U1RTS | ||||
| PC5 | C1+ | Port | U4Tx | U1Tx | M0PWM7 | PhA1 | WT0CCP1 | U1CTS | ||||
| PC6 | C0+ | Port | U3Rx | PhB1 | WT1CCP0 | USB0epen | ||||||
| PC7 | C0- | Port | U3Tx | WT1CCP1 | USB0pflt | |||||||
| PD0 | Ain7 | Port | SSI3Clk | SSI1Clk | I2C3SCL | M0PWM6 | M1PWM0 | WT2CCP0 | ||||
| PD1 | Ain6 | Port | SSI3Fss | SSI1Fss | I2C3SDA | M0PWM7 | M1PWM1 | WT2CCP1 | ||||
| PD2 | Ain5 | Port | SSI3Rx | SSI1Rx | M0Fault0 | WT3CCP0 | USB0epen | |||||
| PD3 | Ain4 | Port | SSI3Tx | SSI1Tx | IDX0 | WT3CCP1 | USB0pflt | |||||
| PD4 | USB0DM | Port | U6Rx | WT4CCP0 | ||||||||
| PD5 | USB0DP | Port | U6Tx | WT4CCP1 | ||||||||
| PD6 | Port | U2Rx | M0Fault0 | PhA0 | WT5CCP0 | |||||||
| PD7 | Port | U2Tx | PhB0 | WT5CCP1 | NMI | |||||||
| PE0 | Ain3 | Port | U7Rx | |||||||||
| PE1 | Ain2 | Port | U7Tx | |||||||||
| PE2 | Ain1 | Port | ||||||||||
| PE3 | Ain0 | Port | ||||||||||
| PE4 | Ain9 | Port | U5Rx | I2C2SCL | M0PWM4 | M1PWM2 | CAN0Rx | |||||
| PE5 | Ain8 | Port | U5Tx | I2C2SDA | M0PWM5 | M1PWM3 | CAN0Tx | |||||
| PF0 | Port | U1RTS | SSI1Rx | CAN0Rx | M1PWM4 | PhA0 | T0CCP0 | NMI | C0o | |||
| PF1 | Port | U1CTS | SSI1Tx | M1PWM5 | PhB0 | T0CCP1 | C1o | TRD1 | ||||
| PF2 | Port | SSI1Clk | M0Fault0 | M1PWM6 | T1CCP0 | TRD0 | ||||||
| PF3 | Port | SSI1Fss | CAN0Tx | M1PWM7 | T1CCP1 | TRCLK | ||||||
| PF4 | Port | M1Fault0 | IDX0 | T2CCP0 | USB0epen |
Table half dozen.1. PMCx bits in the GPIOPCTL annals on the LM4F/TM4C specify alternating functions. PD4 and PD5 are hardwired to the USB device. PA0 and PA1 are hardwired to the serial port. PWM non on LM4F120.
The LaunchPad evaluation board (Figure 6.2) is a low-cost development board bachelor as office number EK-LM4F120XL and EK-TM4C123GXL from https://estore.ti.com/ and in the US from regular electronic distributors similar Digikey, Mouser, Arrow, Newark, and Avnet. For detailed instruction for obtaining the lab kit, refer to http://users.ece.utexas.edu/~valvano/edX/. The microcontroller board provides an integrated In-Excursion Debug Interface (ICDI), which allows programming and debugging of the onboard LM4F120 or TM4C123 microcontroller. One USB cable is used by the debugger (ICDI), and the other USB allows the user to develop USB applications (device). The user can select board power to come from either the debugger (ICDI) or the USB device (device) by setting the Power selection switch.
Effigy 6.2. Tiva LaunchPad based on the LM4F120H5QR or TM4C123GH6PM.
Pins PA1 – PA0 create a serial port, which is linked through the debugger cable to the PC. The serial link is a physical UART as seen past the LF4F120/TM4C and mapped to a virtual COM port on the PC. The USB device interface uses PD4 and PD5. The JTAG debugger requires pins PC3 – PC0. The LaunchPad connects PB6 to PD0, and PB7 to PD1. If you wish to use both PB6 and PD0 you will need to remove the R9 resistor. Similarly, to use both PB7 and PD1 remove the R10 resistor.
The Tiva LaunchPad evaluation lath has two switches and i 3-colour LED. See Figure half-dozen.3. The switches are negative logic and will require activation of the internal pull-upward resistors. In particular, you will fix $.25 0 and 4 in GPIO_PORTF_PUR_R register. The LED interfaces on PF3 – PF1 are positive logic. To apply the LED, make the PF3 – PF1 pins an output. To activate the cherry color, output a i to PF1. The blue color is on PF2, and the light-green colour is controlled by PF3. The 0-Ω resistors (R1, R2, R11, R12, R13, R25, and R29) can exist removed to disconnect the corresponding pin from the external hardware.
The LaunchPad has four x-pin connectors, labeled as J1 J2 J3 J4 in Figures 6.2 and half dozen.4, to which you can adhere your external signals. The top side of these connectors has male pins, and the bottom side has female sockets. The intent is to stack boards together to make a layered system. Texas Instruments also supplies Booster Packs, which are pre-made external devices that will plug into this 40-pin connector. The Booster Packs for the MSP430 LaunchPad are uniform with this board. One simply plugs the twenty-pin connectors of the MSP430 booster into the outer two rows. The inner x-pin headers (connectors J3 and J4) apply only to Stellaris or Tiva Booster Packs.
Figure six.3. Switch and LED interfaces on the Tiva LaunchPad Evaluation Board. The aught ohm resistors can be removed then the corresponding pin tin be used for its regular purpose.
At that place are a number of good methods to connect external circuits to the LaunchPad. One method is to buy a male person to female person jumper cablevision (e.g., item number 826 at www.adafruit.com). A second method is to solder a solid wire into a female person socket (e.grand., Hirose DF11-2428SCA) creating a male to female jumper wire.
Since the LaunchPad has both male person and female headers, a very cheap method to build systems is to connect solid 24 gauge wire to the female person headers on the bottom.
Figure 6.4. Interface connectors on the Tiva LM4F120/TM4C123 LaunchPad Evaluation Board.
Each pin has one configuration scrap in the GPIOAMSEL annals. We set this flake to connect the port pin to the ADC or analog comparator. For digital functions, each pin as well has 4 bits in the GPIOPCTL register, which we ready to specify the alternative function for that pin (0 means regular I/O port). Not every pin can be connected to every culling function. Come across Table 6.1.
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Video half dozen.1. Overview of Ports |
Video vi.2. Launchpad running starter lawmaking out of the box |
half dozen.two. Basic Concepts of Input and Output Ports
The simplest I/O port on a microcontroller is the parallel port. A parallel I/O port is a simple mechanism that allows the software to interact with external devices. It is called parallel because multiple signals can be accessed all at once. An input port, which allows the software to read external digital signals, is read only. That means a read cycle access from the port address returns the values existing on the inputs at that time. In particular, the tristate commuter (triangle shaped circuit in Figure 6.5) will drive the input signals onto the information passenger vehicle during a read bike from the port address. A write cycle access to an input port unremarkably produces no effect. The digital values existing on the input pins are copied into the microcontroller when the software executes a read from the port accost. There are no digital input-only ports on the LM4F/TM4C family of microcontrollers. The LM4F/TM4C family unit of microcontrollers has 5V-tolerant digital inputs, pregnant an input loftier signal can be any voltage from 2.0 to 5.0 V. On the STMicroelectronics STM32F10xx family, some inputs are v-V tolerant and others are not.
Figure 6.5. A read only input port allows the software to sense external digital signals.
: What happens if the software writes to an input port like Figure six.5?
While an input device ordinarily just involves the software reading the port, an output port can participate in both the read and write cycles very much like a regular retentiveness. Effigy 6.6 describes a readable output port. A write cycle to the port address will bear upon the values on the output pins. In particular, the microcontroller places information on the data double-decker and that information is clocked into the D flip-flops. Since it is a readable output, a read cycle access from the port accost returns the electric current values existing on the port pins. In that location are no output-only ports on the LM4F/TM4C family of microcontrollers.
Figure 6.half-dozen. A readable output port allows the software to generate external digital signals.
: What happens if the software reads from an output port like Effigy six.6?
To make the microcontroller more marketable, well-nigh ports tin be software-specified to be either inputs or outputs. Microcontrollers apply the concept of a direction register to decide whether a pivot is an input (direction register bit is 0) or an output (direction register bit is ane), equally shown in Figure 6.7. We define an initialization ritual as a program executed during start up that initializes hardware and software. If the ritual software makes direction fleck zero, the port behaves like a simple input, and if it makes the direction flake one, it becomes a readable output port. Each digital port pin has a management bit. This ways some pins on a port may be inputs while others are outputs. The digital port pins on most microcontrollers are bidirectional, operating similar to Figure 6.vii.
Figure 6.seven. A bidirectional port can be configured as a read-only input port or a readable output port.
Common Mistake: Many program errors can be traced to confusion between I/O ports and regular memory. For instance, you should non write to an input port, and sometimes we cannot read from an output port.
half-dozen.3. I/O Programming and the Management Register
On about embedded microcontrollers, the I/O ports are memory mapped. This means the software can admission an input/output port simply by reading from or writing to the appropriate address. Information technology is of import to realize that fifty-fifty though I/O operations "await" like reads and writes to memory variables, the I/O ports oft Practise NOT act similar retentivity. For case, some bits are read-only, some are write-but, some can only be cleared, others can only be prepare, and some $.25 cannot be modified. To brand our software more readable we include symbolic definitions for the I/O ports. We set the direction annals (e.g., GPIO_PORTF_DIR_R ) to specify which pins are input and which are output. Private port pins can be general purpose I/O (GPIO) or have an alternate role. We will set $.25 in the alternating function register (e.g., GPIO_PORTF_AFSEL_R ) when nosotros wish to activate the alternate functions listed in Table 6.1. For each I/O pin we wish to use whether GPIO or alternate function we must enable the digital circuits by setting the bit in the enable register (e.g., GPIO_PORTF_DEN_R ). Typically, we write to the direction and alternate part registers once during the initialization phase. We utilise the data register (e.thou., GPIO_PORTF_DATA_R ) to perform input/output on the port. Conversely, we read and write the data annals multiple times to perform input and output respectively during the running stage. Table 6.two shows some of the parallel port registers for the LM4F120/TM4C123. The only differences among the Stellaris and Tiva families are the number of ports and available pins in each port.
| Address | 7 | half-dozen | five | iv | 3 | 2 | 1 | 0 | Proper noun |
| $400F.E108 | -- | -- | GPIOF | GPIOE | GPIOD | GPIOC | GPIOB | GPIOA | SYSCTL_RCGC2_R |
| $4000.43FC | Information | DATA | DATA | DATA | DATA | Data | DATA | Data | GPIO_PORTA_DATA_R |
| $4000.4400 | DIR | DIR | DIR | DIR | DIR | DIR | DIR | DIR | GPIO_PORTA_DIR_R |
| $4000.4420 | SEL | SEL | SEL | SEL | SEL | SEL | SEL | SEL | GPIO_PORTA_AFSEL_R |
| $4000.4510 | PUE | PUE | PUE | PUE | PUE | PUE | PUE | PUE | GPIO_PORTA_PUR_R |
| $4000.451C | DEN | DEN | DEN | DEN | DEN | DEN | DEN | DEN | GPIO_PORTA_DEN_R |
| $4000.4524 | 1 | one | 1 | 1 | 1 | ane | i | 1 | GPIO_PORTA_CR_R |
| $4000.4528 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO_PORTA_AMSEL_R |
| $4000.53FC | Data | Data | Data | DATA | DATA | DATA | Data | DATA | GPIO_PORTB_DATA_R |
| $4000.5400 | DIR | DIR | DIR | DIR | DIR | DIR | DIR | DIR | GPIO_PORTB_DIR_R |
| $4000.5420 | SEL | SEL | SEL | SEL | SEL | SEL | SEL | SEL | GPIO_PORTB_AFSEL_R |
| $4000.5510 | PUE | PUE | PUE | PUE | PUE | PUE | PUE | PUE | GPIO_PORTB_PUR_R |
| $4000.551C | DEN | DEN | DEN | DEN | DEN | DEN | DEN | DEN | GPIO_PORTB_DEN_R |
| $4000.5524 | 1 | i | 1 | i | ane | one | 1 | one | GPIO_PORTB_CR_R |
| $4000.5528 | 0 | 0 | AMSEL | AMSEL | 0 | 0 | 0 | 0 | GPIO_PORTB_AMSEL_R |
| $4000.63FC | Data | Information | DATA | Information | JTAG | JTAG | JTAG | JTAG | GPIO_PORTC_DATA_R |
| $4000.6400 | DIR | DIR | DIR | DIR | JTAG | JTAG | JTAG | JTAG | GPIO_PORTC_DIR_R |
| $4000.6420 | SEL | SEL | SEL | SEL | JTAG | JTAG | JTAG | JTAG | GPIO_PORTC_AFSEL_R |
| $4000.6510 | PUE | PUE | PUE | PUE | JTAG | JTAG | JTAG | JTAG | GPIO_PORTC_PUR_R |
| $4000.651C | DEN | DEN | DEN | DEN | JTAG | JTAG | JTAG | JTAG | GPIO_PORTC_DEN_R |
| $4000.6524 | i | 1 | 1 | 1 | JTAG | JTAG | JTAG | JTAG | GPIO_PORTC_CR_R |
| $4000.6528 | AMSEL | AMSEL | AMSEL | AMSEL | JTAG | JTAG | JTAG | JTAG | GPIO_PORTC_AMSEL_R |
| $4000.73FC | DATA | Information | Data | Data | Information | DATA | DATA | Data | GPIO_PORTD_DATA_R |
| $4000.7400 | DIR | DIR | DIR | DIR | DIR | DIR | DIR | DIR | GPIO_PORTD_DIR_R |
| $4000.7420 | SEL | SEL | SEL | SEL | SEL | SEL | SEL | SEL | GPIO_PORTD_AFSEL_R |
| $4000.7510 | PUE | PUE | PUE | PUE | PUE | PUE | PUE | PUE | GPIO_PORTD_PUR_R |
| $4000.751C | DEN | DEN | DEN | DEN | DEN | DEN | DEN | DEN | GPIO_PORTD_DEN_R |
| $4000.7524 | CR | 1 | 1 | one | ane | 1 | 1 | ane | GPIO_PORTD_CR_R |
| $4000.7528 | 0 | 0 | AMSEL | AMSEL | AMSEL | AMSEL | AMSEL | AMSEL | GPIO_PORTD_AMSEL_R |
| $4002.43FC | Information | Data | DATA | Information | Data | DATA | GPIO_PORTE_DATA_R | ||
| $4002.4400 | DIR | DIR | DIR | DIR | DIR | DIR | GPIO_PORTE_DIR_R | ||
| $4002.4420 | SEL | SEL | SEL | SEL | SEL | SEL | GPIO_PORTE_AFSEL_R | ||
| $4002.4510 | PUE | PUE | PUE | PUE | PUE | PUE | GPIO_PORTE_PUR_R | ||
| $4002.451C | DEN | DEN | DEN | DEN | DEN | DEN | GPIO_PORTE_DEN_R | ||
| $4002.4524 | one | one | one | ane | 1 | i | GPIO_PORTE_CR_R | ||
| $4002.4528 | AMSEL | AMSEL | AMSEL | AMSEL | AMSEL | AMSEL | GPIO_PORTE_AMSEL_R | ||
| $4002.53FC | Data | DATA | Information | Data | DATA | GPIO_PORTF_DATA_R | |||
| $4002.5400 | DIR | DIR | DIR | DIR | DIR | GPIO_PORTF_DIR_R | |||
| $4002.5420 | SEL | SEL | SEL | SEL | SEL | GPIO_PORTF_AFSEL_R | |||
| $4002.5510 | PUE | PUE | PUE | PUE | PUE | GPIO_PORTF_PUR_R | |||
| $4002.551C | DEN | DEN | DEN | DEN | DEN | GPIO_PORTF_DEN_R | |||
| $4002.5524 | one | one | i | ane | CR | GPIO_PORTF_CR_R | |||
| $4002.5528 | 0 | 0 | 0 | 0 | 0 | GPIO_PORTF_AMSEL_R | |||
| 31-28 | 27-24 | 23-20 | 19-16 | 15-12 | 11-8 | 7-four | 3-0 | ||
| $4000.452C | PMC7 | PMC6 | PMC5 | PMC4 | PMC3 | PMC2 | PMC1 | PMC0 | GPIO_PORTA_PCTL_R |
| $4000.552C | PMC7 | PMC6 | PMC5 | PMC4 | PMC3 | PMC2 | PMC1 | PMC0 | GPIO_PORTB_PCTL_R |
| $4000.652C | PMC7 | PMC6 | PMC5 | PMC4 | 0x1 | 0x1 | 0x1 | 0x1 | GPIO_PORTC_PCTL_R |
| $4000.752C | PMC7 | PMC6 | PMC5 | PMC4 | PMC3 | PMC2 | PMC1 | PMC0 | GPIO_PORTD_PCTL_R |
| $4002.452C | PMC5 | PMC4 | PMC3 | PMC2 | PMC1 | PMC0 | GPIO_PORTE_PCTL_R | ||
| $4002.552C | PMC4 | PMC3 | PMC2 | PMC1 | PMC0 | GPIO_PORTF_PCTL_R | |||
| $4000.6520 | LOCK (write 0x4C4F434B to unlock, other locks) (reads 1 if locked, 0 if unlocked) | GPIO_PORTC_LOCK_R | |||||||
| $4000.7520 | LOCK (write 0x4C4F434B to unlock, other locks) (reads 1 if locked, 0 if unlocked) | GPIO_PORTD_LOCK_R | |||||||
| $4002.5520 | LOCK (write 0x4C4F434B to unlock, other locks) (reads 1 if locked, 0 if unlocked) | GPIO_PORTF_LOCK_R | |||||||
Table vi.2 Some TM4C123 parallel ports. Each register is 32 bits wide. For PMCx $.25, see Table 6.1. JTAG means practise not use these pins and do not change any of these $.25.
To initialize an I/O port for general employ nosotros perform vii steps. Steps 2 through four are needed only for the LM4F/TM4C microcontrollers. First, we activate the clock for the port. Second, we unlock the port; unlocking is needed only for pins PC3-0, PD7, PF0 on the LM4F and TM4C. Tertiary, we disable the analog function of the pin, because we will be using the pin for digital I/O. Fourth, nosotros clear bits in the PCTL (Table six.1) to select regular digital role. Fifth, nosotros set its management register. Sixth, we clear bits in the alternate function register, and lastly, we enable the digital port. We demand to add a brusque filibuster between activating the clock and accessing the port registers. The management annals specifies bit for scrap whether the corresponding pins are input or output. A DIR flake of 0 ways input and 1 means output.
Common Error: You lot will go a coach mistake if y'all access a port without enabling its clock.
In this first case we will make PF4 and PF0 input, and we volition make PF3 PF2 and PF1 output, as shown in Program vi.i. To use a port nosotros offset must activate its clock in the SYSCTL_RCGC2_R register. The second step is to unlock the port, by writing a special value to the LOCK register, followed by setting bits in the CR register. Only PC3-0, PD7, and PF0 on the TM4C demand to be unlocked. All the other $.25 on the TM4C are always unlocked. The third step is to disable the analog functionality, by immigration bits in the AMSEL register. The 4th step is to select GPIO functionality, by immigration bits in the PCTL register, as described in Table 6.ane. The fifth step is to specify whether the pin is an input or an output by clearing or setting $.25 in the DIR register. Considering nosotros are using the pins as regular digital I/O, the sixth step is to clear the corresponding bits in the AFSEL annals. The last step is to enable the corresponding I/O pins by writing ones to the DEN register. To run this case on the LaunchPad, we likewise set bits in the PUR register for the 2 switch inputs (Effigy vi.3) to have an internal pull-upward resistor.
When the software reads from location 0x400253FC, the bottom eight $.25 are returned with the electric current values on Port F. The tiptop 24 bits are returned zero. As shown in Effigy 6.seven, when reading an I/O port, the input pins show the current digital state, and the output pins show the value final written to the port. The role PortF_Input will read from the v input pins, and return a value depending on the electric current status of the inputs. As shown in Effigy six.7, when writing to an I/O port, the input pins are not afflicted, and the output pins are changed to the value written to the port. The part PortF_Output will write new values to the three output pins. The #include will define symbolic names for all the I/O ports for that microcontroller. The header file tm4c123ge6pm.h can exist found in the inc folder.
#include "tm4c123ge6pm.h"
unsigned long In; // input from PF4
unsigned long Out; // output to PF2 (bluish LED)
// Role Prototypes
void PortF_Init(void);
// 3. Subroutines Department
// MAIN: Mandatory for a C Program to be executable
int principal(void){ // initialize PF0 and PF4 and brand them inputs
PortF_Init(); // brand PF3-one out (PF3-1 built-in LEDs)
while(one){
In = GPIO_PORTF_DATA_R&0x10; // read PF4 into Sw1
In = In>>two; // shift into position PF2
Out = GPIO_PORTF_DATA_R;
Out = Out&0xFB;
Out = Out|In;
GPIO_PORTF_DATA_R = Out; // output
}
}
// Subroutine to initialize port F pins for input and output
// PF4 is input SW1 and PF2 is output Bluish LED
// Inputs: None
// Outputs: None
// Notes: ...
void PortF_Init(void){ volatile unsigned long delay;
SYSCTL_RCGC2_R |= 0x00000020; // 1) actuate clock for Port F
delay = SYSCTL_RCGC2_R; // let fourth dimension for clock to start
GPIO_PORTF_LOCK_R = 0x4C4F434B; // 2) unlock GPIO Port F
GPIO_PORTF_CR_R = 0x1F; // let changes to PF4-0
// only PF0 needs to be unlocked, other $.25 can't be locked
GPIO_PORTF_AMSEL_R = 0x00; // three) disable analog on PF
GPIO_PORTF_PCTL_R = 0x00000000; // four) PCTL GPIO on PF4-0
GPIO_PORTF_DIR_R = 0x0E; // 5) PF4,PF0 in, PF3-1 out
GPIO_PORTF_AFSEL_R = 0x00; // 6) disable alt funct on PF7-0
GPIO_PORTF_PUR_R = 0x11; // enable pull-upward on PF0 and PF4
GPIO_PORTF_DEN_R = 0x1F; // seven) enable digital I/O on PF4-0
}
Program half-dozen.one. A set of functions using PF4,PF0 equally inputs and PF3-ane equally outputs (C6_InputOutputxxx.zippo).
: Does the entire port need to be defined as input or output, or can some pins be input while others are output?
: How do we change Plan 6.i to run using Port A?
Interactive Tool 6.one
The following tool allows you to examination your understanding of what happens when you lot WRITE to the Information register for PortF.
Note, writing to input pins has no effect. See what happens if yous click on one of the 2 switches.
Enter a 5 bit number to write to GPIO_PORTF_DATA_R, bits 4 through 0:
Video 6.3. Device registers, Port Initialization steps with an PortF as an example
In Program 6.1 the assumption was the software module had access to all of Port F. In other words, this software endemic all pins of Port F. In most cases, a software module needs access to merely some of the port pins. If two or more software modules admission the aforementioned port, a conflict volition occur if one module changes modes or output values set by another module. It is skillful software pattern to write friendly software, which only affects the individual pins as needed. Friendly software does not change the other bits in a shared register. Conversely, unfriendly software modifies more bits of a annals than it needs to. The difficulty of unfriendly code is each module volition run properly when tested by itself, simply weird bugs event when two or more modules are combined.
Consider the problem that a software module needs to output to just Port A chip vii. After enabling the clock for Port A, we employ read-alter-write software to initialize simply pin 7. The following initialization does not alter the configurations for the other 7 bits in Port A. Unlocking is not required for PA7 (simply PD7 and PF0 require unlocking)
SYSCTL_RCGC2_R |= 0x00000001; // one) activate clock for Port A
delay = SYSCTL_RCGC2_R; // allow time for clock to start
GPIO_PORTA_AMSEL_R &= ~0x80; // iii) disable analog on PA7
GPIO_PORTA_PCTL_R &= ~0xF0000000; // four) PCTL GPIO on PA7
GPIO_PORTA_DIR_R |= 0x80; // 5) PA7 out
GPIO_PORTA_AFSEL_R &= ~0x80; // 6) disable alt funct on PA7
GPIO_PORTA_DEN_R |= 0x80; // 7) enable digital I/O on PA7
There is no conflict if two or more modules enable the clock for Port A. There are two ways on LM4F/TM4C microcontrollers to admission individual port bits. The first method is to use read-modify-write software to change just one pin. A read-or-write sequence tin can be used to set bits.
| LDR R1, =GPIO_PORTA_DATA_R LDR R0, [R1] ; previous ORR R0, R0, #0x80 ; set bit ane STR R0, [R1] | // brand PA7 high GPIO_PORTA_DATA_R |= 0x80; |
A read-and-write sequence tin can be used to clear i or more bits.
| LDR R1, =GPIO_PORTA_DATA_R LDR R0, [R1] ; previous BIC R0, R0, #0x80 ; clear fleck 1 STR R0, [R1] | // brand PA7 low GPIO_PORTA_DATA_R &= ~0x80; |
|
Video 6.5. Software Evolution of solution |
Video 6.6. Writing friendly code |
The second method uses the bit-specific addressing. The LM4F/TM4C family implements a flexible way to access port pins. This bit-specific addressing doesn't work for all the I/O registers, just the parallel port information registers. The machinery allows collective access to i to 8 bits in a data port. We define 8 address offset constants in Tabular array six.iii. Basically, if nosotros are interested in bit b, the abiding is 4*2 b . At that place 256 possible bit combinations we might be interested in accessing, from all of them to none of them. Each possible flake combination has a separate address for accessing that combination. For each scrap we are interested in, nosotros add up the corresponding constants from Tabular array vi.3 and and so add that sum to the base of operations accost for the port. The base of operations addresses for the data ports tin can exist found Tabular array 6.two. For example, presume we are interested in Port A bits i, 2, and 3. The base address for Port A is 0x4000.4000, and the constants are 0x0008, 0x0010, and 0x0020. The sum of 0x4000.4000+0x0008+0x0010 +0x0020 is the accost 0x4000.4038. If we read from 0x4000.4038 only bits one, 2, and three will exist returned. If nosotros write to this accost but bits 1, 2, and three will be modified.
| If nosotros wish to access bit | Constant |
| vii | 0x0200 |
| vi | 0x0100 |
| 5 | 0x0080 |
| 4 | 0x0040 |
| iii | 0x0020 |
| 2 | 0x0010 |
| 1 | 0x0008 |
| 0 | 0x0004 |
Table half dozen.3. Address offsets used to specify individual data port bits.
The base of operations address for Port A is 0x4000.4000. If we want to read and write all 8 bits of this port, the constants will add together up to 0x03FC. Notice that the sum of the base address and the constants yields the 0x4000.43FC address used in Table half-dozen.2 and Programme half-dozen.1. In other words, read and write operations to GPIO_PORTA_DATA_R will admission all 8 bits of Port A. If we are interested in simply scrap five of Port A, we add 0x0080 to 0x4000.4000, and nosotros can define this in C and in associates as
#define PA5 (*((volatile unsigned long *)0x40004080))
PA5 EQU 0x40004080
At present, a simple write operation can be used to set PA5. The following lawmaking is friendly because it does not change the other 7 bits of Port A.
PA5 = 0x20; // make PA5 high
A simple write sequence will clear PA5. The following lawmaking is also friendly.
PA5 = 0x00; // make PA5 low
A read from PA5 volition return 0x20 or 0x00 depending on whether the pin is high or low, respectively. If PA5 is an output, the following code is also friendly.
PA5 = PA5^0x20; // toggle PA5
Notation that the base address when computing the bit-specific accost for PortA is 0x40004000, the following table lists the base of operations addresses for the other ports.
| Port | Base of operations address |
|---|---|
| PortA | 0x40004000 |
| PortB | 0x40005000 |
| PortC | 0x40006000 |
| PortD | 0x40007000 |
| PortE | 0x40024000 |
| PortF | 0x40025000 |
Table half dozen.4. Base Addresses for bit-specific addressing of ports A-F
: What happens if we write to location 0x4000.4000?
: Specify a #ascertain that allows us to access bits 7 and 1 of Port A. Use this #define to brand both bits 7 and one of Port A high.
: Specify a #ascertain that allows us to access bits six, 1, 0 of Port B. Use this #define to make bits vi, ane and 0 of Port B high.
To understand the port definitions in C, nosotros call up #define is merely a copy paste. Eastward.chiliad.,
data = PA5;
becomes
data = (*((volatile unsigned long *)0x40004080)) ;
To understand why we ascertain ports this mode, let's break this port definition into pieces. First, 0x40004080 is the address of Port A fleck 5. If we write just #ascertain PA5 0x40004080 it volition create
data = 0x40004080;
which does non read the contents of PA5 as desired. This means we need to dereference the address. If we write #define PA5 (*0x40004080) information technology will create
data = (*0x40004080);
This will attempt to read the contents at 0x40004080, but doesn't know whether to read 8 16 or 32 bits. So the compiler gives a syntax mistake because the type of data does not lucifer the blazon of (*0x40004080). To solve a blazon mismatch in C we typecast, placing a (new type) in front of the object we wish to convert. We wish strength the type conversion to unsigned 32 $.25, so we modify the definition to include the typecast,
#define PA5 (*((volatile unsigned long *)0x40004080) )
The volatile is added because the value of a port can alter beyond the direct action of the software. It forces the C compiler to read a new value each fourth dimension through a loop and not rely on the previous value.
6.4. Debugging monitor using an LED
I of the important tasks in debugging a system is to observe when and where our software is executing. A debugging tool that works well for real-time systems is the monitor. In a real-time system, we need the execution time of the debugging tool to be modest compared to the execution time of the program itself. Intrusiveness is defined equally the degree to which the debugging code itself alters the performance of the organisation beingness tested. A monitor is an independent output procedure, somewhat similar to the print statement, but ane that executes much faster and thus is much less intrusive. An LED attached to an output port of the microcontroller is an instance of a BOOLEAN monitor. You can place LEDs on unused output pins. Software toggles these LEDs to permit you know where and when your programme is running. Assume an LED is attached to Port F bit ii. Plan 6.two will toggle the LED. Nosotros create a bit-specific address constant to access just PF2:
| PF2 EQU 0x40025010 Toggle LDR R1, =PF2 LDR R0, [R1] EOR R0, R0, #0x04 STR R0, [R1] BX LR | #define PF2 (*((volatile unsigned long *)0x40025010)) void Toggle(void){ PF2 ^= 0x04; // toggle LED } |
Program six.2. An LED monitor.
A heartbeat is a pulsing output that is not required for the correct operation of the organization, but information technology is useful to see while the programme is running. In particular, you add BL Toggle statements at strategic places within your system. It only takes 13 passenger vehicle cycles to execute. Port K must be initialized so that flake 2 is an output earlier the debugging begins. You can either observe the LED directly or look at the LED control signals with a loftier-speed oscilloscope or logic analyzer. An LCD can exist an effective monitor for minor amounts of information. Inexpensive LCDs can display from 8 to 160 characters. Unfortunately, it takes about fifty µs to output each grapheme, and then the use of an LCD monitor might exist intrusive. When using LED monitors information technology is better to modify only the 1 bit, leaving the other 7 equally is. In this style, you can take additional LED monitors.
6.five. Hardware debugging tools
Microcomputer related problems ofttimes require the use of specialized equipment to debug the system hardware and software. 2 very useful tools are the logic analyzer and the oscilloscope. A logic analyzer is essentially a multiple channel digital storage telescopic with many ways to trigger, come across Figure vi.eight. Every bit a troubleshooting assist, it allows the experimenter to find numerous digital signals at various points in time and thus make decisions based upon such observations. Every bit with any debugging process, it is necessary to select which information to observe out of a vast set of possibilities. Any digital point in the system tin exist connected to the logic analyzer. Figure six.viii shows an 8-channel logic analyzer, but existent devices can support 128 or more than channels. One trouble with logic analyzers is the massive amount of data that it generates. With logic analyzers (similar to other debugging techniques) we must strategically select which signals in the digital interfaces to observe and when to observe them. In detail, the triggering mechanism can be used to capture data at advisable times eliminating the demand to sift through volumes of output. Sometimes there are extra I/O pins on the microcontroller, not needed for the normal performance of the organization (shown as the bottom two wires in Figure half-dozen.8). In this case, we tin connect the pins to a logic analyzer, and add together software debugging instruments that set and clear these pins at strategic times within the software. In this style we can visualize the hardware/software timing.
Figure 6.8. A logic analyzer and example output.
An oscilloscope can be used to capture voltage versus time data. You tin suit the voltage range and fourth dimension scale. The oscilloscope trigger is how and when the data will exist capture. In normal mode, we mensurate patterns that repeat over and over, and we apply the trigger (due east.g., rising edge of aqueduct ane) to freeze the image. In single shot style, the display is initially bare, and in one case the trigger occurs, one trace is captured and display.
6.6. Affiliate 6 Quiz
half dozen.1 To make a pin a digital input, what value do you lot load into corresponding bits the post-obit registers. Assume it does not need an internal pullup
DIR
PUR
PCTL
AFSEL
AMSEL
DEN
6.2 To make a pin a digital output, what value practice you load into corresponding $.25 the following registers. Assume it does non need an internal pullup
DIR
PUR
PCTL
AFSEL
AMSEL
DEN
half dozen.3 Which line of C code is a friendly manner to fix Port B bit ii assuming this pin has already been initialized every bit an output
GPIO_PORTB_DATA_R = 0x00;
GPIO_PORTB_DATA_R = 0x02;
GPIO_PORTB_DATA_R = 0x04;
GPIO_PORTB_DATA_R |= 0x02;
GPIO_PORTB_DATA_R |= 0x04;
GPIO_PORTB_DATA_R &= 0x02;
GPIO_PORTB_DATA_R &= 0x04;
GPIO_PORTB_DATA_R &= ~0x02;
GPIO_PORTB_DATA_R &= ~0x04;
6.4 Which line of C code is a friendly style to clear Port B bit two bold this pivot has already been initialized every bit an output
GPIO_PORTB_DATA_R = 0x00;
GPIO_PORTB_DATA_R = 0x02;
GPIO_PORTB_DATA_R = 0x04;
GPIO_PORTB_DATA_R |= 0x02;
GPIO_PORTB_DATA_R |= 0x04;
GPIO_PORTB_DATA_R &= 0x02;
GPIO_PORTB_DATA_R &= 0x04;
GPIO_PORTB_DATA_R &= ~0x02;
GPIO_PORTB_DATA_R &= ~0x04;
6.5 Which debugging instrument can measure voltage versus time?
Heart beat
Oscilloscope
Logic analyzer
LED
6.6 Which debugging instrument tin can measure out multiple digital signals versus fourth dimension?
Middle vanquish
Oscilloscope
Logic analyzer
LED
Reprinted with approving from Embedded Systems: Introduction to ARM Cortex-Yard Microcontrollers, 2014, ISBN: 978-1477508992, http://users.ece.utexas.edu/~valvano/arm/outline1.htm
How to Read a Pin on the Tm4c123
Source: https://users.ece.utexas.edu/~valvano/Volume1/E-Book/C6_MicrocontrollerPorts.htm
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